A recent development in semiconductor technology is the introduction of devices incorporating both field effect transistors and bipolar transistors on a common single crystal silicon substrate. A particularly advantageous form of this technology employs polysilicon for the formation of field effect transistor gates and bipolar transistor emitters. Devices incorporating those features are described for example in our published specification No. 2,173,638 (P. D. Scovell et al 15-13-8). The use of polysilicon for this purpose requires the use of a selective etching process that will selectively remove polysilicon without significant attack of the underlying single crystal silicon. The etchant materials currently employed for this purpose have only a moderate selectivity. In addition, the isotropic etching characteristics of the materials currently used causes significant undercut of the polysilicon. This is clearly undesirable as it limits the accuracy with which circuit features may be defined and in turn limits the packing density of devices on the chip. A further disadvantage of conventional etchants is that they function by reactive ion etching (RIE). This results in radiation damage of devices formed in the single crystal substrate.
The object of the invention is to minimise or to overcome these disadvantages.